From 94e6d1403ef3f7135bc57ba90c6d3b051c367fb5 Mon Sep 17 00:00:00 2001 From: Alex Voinea Date: Thu, 30 Sep 2021 22:09:31 +0200 Subject: [PATCH] (Hopefully) Fir shr16 timing issues Should also hopefully fix the random behavior of the DIR pins. When I was testing a really slow timing, the steppers seemed to want to not go in the right direction. That was fixed with the critical section. The 1us delay might be overkill, but I'm not the one that added a 100nF capacitor on the LATCH line (basically chip select). This might be part of the randomness that happened and why some board behaved better than others (stronger GPIO outputs) --- src/hal/avr/shr16.cpp | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/src/hal/avr/shr16.cpp b/src/hal/avr/shr16.cpp index 85ab503..6bc6107 100644 --- a/src/hal/avr/shr16.cpp +++ b/src/hal/avr/shr16.cpp @@ -1,6 +1,8 @@ #include "../shr16.h" #include "../gpio.h" #include "../../pins.h" +#include +#include #define SHR16_LED_MSK 0xffc0 #define SHR16_DIR_MSK 0x0015 @@ -20,15 +22,21 @@ void SHR16::Init() { } void SHR16::Write(uint16_t v) { - using namespace hal::gpio; - WritePin(SHR16_LATCH, Level::low); - for (uint16_t m = 0x8000; m; m >>= 1) { - WritePin(SHR16_DATA, (Level)((m & v) != 0)); - WritePin(SHR16_CLOCK, Level::high); - WritePin(SHR16_CLOCK, Level::low); + ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { + using namespace hal::gpio; + WritePin(SHR16_LATCH, Level::low); + _delay_us(1); + for (uint16_t m = 0x8000; m; m >>= 1) { + WritePin(SHR16_DATA, (Level)((m & v) != 0)); + asm("nop"); + WritePin(SHR16_CLOCK, Level::high); + asm("nop"); + WritePin(SHR16_CLOCK, Level::low); + asm("nop"); + } + WritePin(SHR16_LATCH, Level::high); + shr16_v = v; } - WritePin(SHR16_LATCH, Level::high); - shr16_v = v; } void SHR16::SetLED(uint16_t led) {