From ac4fdd30ad6c906ca024990a8c6a1117705be1f0 Mon Sep 17 00:00:00 2001
From: Alex Voinea <voinea.dragos.alexandru@gmail.com>
Date: Mon, 17 May 2021 08:42:21 +0300
Subject: [PATCH 01/10] spi hal checkpoint

---
 CMakeLists.txt      |  4 +++-
 src/hal/avr/spi.cpp | 21 +++++++++++++++++++++
 src/hal/gpio.h      | 36 +++++++++++++++++++++---------------
 src/hal/spi.h       | 42 ++++++++++++++++++++++++++++++++++++++++++
 src/main.cpp        | 19 ++++++++++++++-----
 5 files changed, 101 insertions(+), 21 deletions(-)
 create mode 100644 src/hal/avr/spi.cpp
 create mode 100644 src/hal/spi.h

diff --git a/CMakeLists.txt b/CMakeLists.txt
index ee55d68..58d59c7 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -170,6 +170,8 @@ objcopy(firmware "ihex" ".hex")
 
 add_custom_command(TARGET firmware POST_BUILD COMMAND avr-objdump ARGS -CSd firmware > firmware.txt)
 
+add_custom_command(TARGET firmware POST_BUILD COMMAND avr-size ARGS -C --mcu=atmega32u4 firmware)
+
 # generate linker map file
 target_link_options(firmware PUBLIC -Wl,-Map=firmware.map)
 
@@ -184,7 +186,7 @@ target_compile_options(firmware PRIVATE -Wdouble-promotion)
 
 # target_link_libraries( firmware PRIVATE A3idesHeaders )
 
-target_sources(firmware PRIVATE src/main.cpp src/hal/avr/cpu.cpp)
+target_sources(firmware PRIVATE src/main.cpp src/hal/avr/cpu.cpp src/hal/avr/spi.cpp)
 
 set_property(
   SOURCE src/version.c
diff --git a/src/hal/avr/spi.cpp b/src/hal/avr/spi.cpp
new file mode 100644
index 0000000..73e260a
--- /dev/null
+++ b/src/hal/avr/spi.cpp
@@ -0,0 +1,21 @@
+#include "../spi.h"
+
+namespace hal {
+namespace spi {
+
+    // void Init(SPI_TypeDef *const hspi, SPI_InitTypeDef *const conf)
+    // {
+    //     using namespace hal;
+    //     // gpio::Init(conf->miso_pin, gpio::GPIO_InitTypeDef(gpio::Mode::input, gpio::Pull::none));
+    //     // gpio::Init(conf->mosi_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
+    //     // gpio::Init(conf->sck_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
+    //     // gpio::Init(conf->ss_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::high));
+
+    //     const uint8_t spi2x = (conf->prescaler == 7) ? 0 : (conf->prescaler & 0x01);
+    //     const uint8_t spr = ((conf->prescaler - 1) >> 1) & 0x03;
+
+    //     hspi->SPCRx = (0 << SPIE) | (1 << SPE) | (0 << DORD) | (1 << MSTR) | (0 << CPOL) | (0 << CPHA) | (spr << SPR0);
+    //     hspi->SPSRx = (spi2x << SPI2X);
+    // }
+}
+}
diff --git a/src/hal/gpio.h b/src/hal/gpio.h
index 80f3545..0ba9687 100644
--- a/src/hal/gpio.h
+++ b/src/hal/gpio.h
@@ -1,3 +1,4 @@
+#pragma once
 #include <inttypes.h>
 #include <avr/io.h>
 
@@ -30,9 +31,6 @@ namespace gpio {
         Mode mode;
         Pull pull;
         Level level;
-        inline GPIO_InitTypeDef()
-            : mode(Mode::input)
-            , pull(Pull::none) {};
         inline GPIO_InitTypeDef(Mode mode, Pull pull)
             : mode(mode)
             , pull(pull) {};
@@ -41,28 +39,36 @@ namespace gpio {
             , level(level) {};
     };
 
-    inline void WritePin(GPIO_TypeDef *const port, const uint8_t pin, Level level) {
+    struct GPIO_pin {
+        GPIO_TypeDef *const port;
+        const uint8_t pin;
+        inline GPIO_pin(GPIO_TypeDef *const port, const uint8_t pin)
+            : port(port)
+            , pin(pin) {};
+    };
+
+    inline void WritePin(const GPIO_pin portPin, Level level) {
         if (level == Level::high)
-            port->PORTx |= (1 << pin);
+            portPin.port->PORTx |= (1 << portPin.pin);
         else
-            port->PORTx &= ~(1 << pin);
+            portPin.port->PORTx &= ~(1 << portPin.pin);
     }
 
-    inline Level ReadPin(GPIO_TypeDef *const port, const uint8_t pin) {
-        return (Level)(port->PINx & (1 << pin));
+    inline Level ReadPin(const GPIO_pin portPin) {
+        return (Level)(portPin.port->PINx & (1 << portPin.pin));
     }
 
-    inline void TogglePin(GPIO_TypeDef *const port, const uint8_t pin) {
-        port->PINx |= (1 << pin);
+    inline void TogglePin(const GPIO_pin portPin) {
+        portPin.port->PINx |= (1 << portPin.pin);
     }
 
-    inline void Init(GPIO_TypeDef *const port, const uint8_t pin, GPIO_InitTypeDef GPIO_Init) {
+    inline void Init(const GPIO_pin portPin, GPIO_InitTypeDef GPIO_Init) {
         if (GPIO_Init.mode == Mode::output) {
-            WritePin(port, pin, GPIO_Init.level);
-            port->DDRx |= (1 << pin);
+            WritePin(portPin, GPIO_Init.level);
+            portPin.port->DDRx |= (1 << portPin.pin);
         } else {
-            port->DDRx &= ~(1 << pin);
-            WritePin(port, pin, (Level)GPIO_Init.pull);
+            portPin.port->DDRx &= ~(1 << portPin.pin);
+            WritePin(portPin, (Level)GPIO_Init.pull);
         }
     }
 
diff --git a/src/hal/spi.h b/src/hal/spi.h
new file mode 100644
index 0000000..3c22ec4
--- /dev/null
+++ b/src/hal/spi.h
@@ -0,0 +1,42 @@
+#pragma once
+#include <inttypes.h>
+#include "gpio.h"
+
+/// SPI interface
+
+namespace hal {
+namespace spi {
+    struct SPI_TypeDef {
+        volatile uint8_t SPCRx;
+        volatile uint8_t SPSRx;
+        volatile uint8_t SPDRx;
+    };
+
+    struct SPI_InitTypeDef {
+        // hal::gpio::GPIO_pin miso_pin;
+        // hal::gpio::GPIO_pin mosi_pin;
+        // hal::gpio::GPIO_pin sck_pin;
+        // hal::gpio::GPIO_pin ss_pin;
+        uint8_t prescaler;
+    };
+
+    // void Init(SPI_TypeDef *const hspi, SPI_InitTypeDef *const conf);
+
+    inline void Init(SPI_TypeDef *const hspi, uint8_t prescaler) {
+        using namespace hal;
+        // gpio::Init(conf->miso_pin, gpio::GPIO_InitTypeDef(gpio::Mode::input, gpio::Pull::none));
+        // gpio::Init(conf->mosi_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
+        // gpio::Init(conf->sck_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
+        // gpio::Init(conf->ss_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::high));
+
+        const uint8_t spi2x = (prescaler == 7) ? 0 : (prescaler & 0x01);
+        const uint8_t spr = ((prescaler - 1) >> 1) & 0x03;
+
+        hspi->SPCRx = (0 << SPIE) | (1 << SPE) | (0 << DORD) | (1 << MSTR) | (0 << CPOL) | (0 << CPHA) | (spr << SPR0);
+        hspi->SPSRx = (spi2x << SPI2X);
+    }
+
+}
+}
+
+#define SPI0 ((hal::spi::SPI_TypeDef *)&SPCR)
diff --git a/src/main.cpp b/src/main.cpp
index f26c6b1..ca2ab7f 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -1,12 +1,21 @@
 #include "logic/mm_control.h"
 #include "hal/gpio.h"
+#include "hal/spi.h"
 
 /// One-time setup of HW and SW components
 /// Called before entering the loop() function
 void setup(){
-    using namespace hal::gpio;
-    hal::gpio::Init(GPIOB, 1, GPIO_InitTypeDef(Mode::output, Level::low));
+    using namespace hal;
 
+    gpio::Init(gpio::GPIO_pin(GPIOB, 3), gpio::GPIO_InitTypeDef(gpio::Mode::input, gpio::Pull::none));
+    gpio::Init(gpio::GPIO_pin(GPIOB, 2), gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
+    gpio::Init(gpio::GPIO_pin(GPIOB, 1), gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
+    // gpio::Init(gpio::GPIO_pin(GPIOB, 0), gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
+
+    // spi::SPI_InitTypeDef spi_conf = {
+    //     .prescaler = 2, //4mhz
+    // };
+    spi::Init(SPI0, 2);
 }
 
 /// Main loop of the firmware
@@ -31,9 +40,9 @@ int main() {
     setup();
     for(;;){
         using namespace hal::gpio;
-        WritePin(GPIOB, 5, Level::low);
-        TogglePin(GPIOB, 6);
-        if (hal::gpio::ReadPin(GPIOB, 7) == hal::gpio::Level::low)
+        WritePin(GPIO_pin(GPIOB, 5), Level::low);
+        TogglePin(GPIO_pin(GPIOB, 6));
+        if (hal::gpio::ReadPin(GPIO_pin(GPIOB, 7)) == hal::gpio::Level::low)
             break;
         loop();
     }

From dc9528b4ea0e87040b263086cb71c8281369a1ba Mon Sep 17 00:00:00 2001
From: Alex Voinea <voinea.dragos.alexandru@gmail.com>
Date: Mon, 17 May 2021 09:01:22 +0300
Subject: [PATCH 02/10] SPI hal: Winning combo

---
 CMakeLists.txt      |  2 +-
 src/hal/avr/spi.cpp | 21 ---------------------
 src/hal/gpio.h      |  8 ++++----
 src/hal/spi.h       | 25 +++++++++++--------------
 src/main.cpp        | 24 +++++++++++-------------
 5 files changed, 27 insertions(+), 53 deletions(-)
 delete mode 100644 src/hal/avr/spi.cpp

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 58d59c7..138f023 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -186,7 +186,7 @@ target_compile_options(firmware PRIVATE -Wdouble-promotion)
 
 # target_link_libraries( firmware PRIVATE A3idesHeaders )
 
-target_sources(firmware PRIVATE src/main.cpp src/hal/avr/cpu.cpp src/hal/avr/spi.cpp)
+target_sources(firmware PRIVATE src/main.cpp src/hal/avr/cpu.cpp)
 
 set_property(
   SOURCE src/version.c
diff --git a/src/hal/avr/spi.cpp b/src/hal/avr/spi.cpp
deleted file mode 100644
index 73e260a..0000000
--- a/src/hal/avr/spi.cpp
+++ /dev/null
@@ -1,21 +0,0 @@
-#include "../spi.h"
-
-namespace hal {
-namespace spi {
-
-    // void Init(SPI_TypeDef *const hspi, SPI_InitTypeDef *const conf)
-    // {
-    //     using namespace hal;
-    //     // gpio::Init(conf->miso_pin, gpio::GPIO_InitTypeDef(gpio::Mode::input, gpio::Pull::none));
-    //     // gpio::Init(conf->mosi_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
-    //     // gpio::Init(conf->sck_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
-    //     // gpio::Init(conf->ss_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::high));
-
-    //     const uint8_t spi2x = (conf->prescaler == 7) ? 0 : (conf->prescaler & 0x01);
-    //     const uint8_t spr = ((conf->prescaler - 1) >> 1) & 0x03;
-
-    //     hspi->SPCRx = (0 << SPIE) | (1 << SPE) | (0 << DORD) | (1 << MSTR) | (0 << CPOL) | (0 << CPHA) | (spr << SPR0);
-    //     hspi->SPSRx = (spi2x << SPI2X);
-    // }
-}
-}
diff --git a/src/hal/gpio.h b/src/hal/gpio.h
index 0ba9687..7b974e8 100644
--- a/src/hal/gpio.h
+++ b/src/hal/gpio.h
@@ -47,22 +47,22 @@ namespace gpio {
             , pin(pin) {};
     };
 
-    inline void WritePin(const GPIO_pin portPin, Level level) {
+    __attribute__((always_inline)) inline void WritePin(const GPIO_pin portPin, Level level) {
         if (level == Level::high)
             portPin.port->PORTx |= (1 << portPin.pin);
         else
             portPin.port->PORTx &= ~(1 << portPin.pin);
     }
 
-    inline Level ReadPin(const GPIO_pin portPin) {
+    __attribute__((always_inline)) inline Level ReadPin(const GPIO_pin portPin) {
         return (Level)(portPin.port->PINx & (1 << portPin.pin));
     }
 
-    inline void TogglePin(const GPIO_pin portPin) {
+    __attribute__((always_inline)) inline void TogglePin(const GPIO_pin portPin) {
         portPin.port->PINx |= (1 << portPin.pin);
     }
 
-    inline void Init(const GPIO_pin portPin, GPIO_InitTypeDef GPIO_Init) {
+    __attribute__((always_inline)) inline void Init(const GPIO_pin portPin, GPIO_InitTypeDef GPIO_Init) {
         if (GPIO_Init.mode == Mode::output) {
             WritePin(portPin, GPIO_Init.level);
             portPin.port->DDRx |= (1 << portPin.pin);
diff --git a/src/hal/spi.h b/src/hal/spi.h
index 3c22ec4..dbf3c1a 100644
--- a/src/hal/spi.h
+++ b/src/hal/spi.h
@@ -13,29 +13,26 @@ namespace spi {
     };
 
     struct SPI_InitTypeDef {
-        // hal::gpio::GPIO_pin miso_pin;
-        // hal::gpio::GPIO_pin mosi_pin;
-        // hal::gpio::GPIO_pin sck_pin;
-        // hal::gpio::GPIO_pin ss_pin;
+        hal::gpio::GPIO_pin miso_pin;
+        hal::gpio::GPIO_pin mosi_pin;
+        hal::gpio::GPIO_pin sck_pin;
+        hal::gpio::GPIO_pin ss_pin;
         uint8_t prescaler;
     };
 
-    // void Init(SPI_TypeDef *const hspi, SPI_InitTypeDef *const conf);
-
-    inline void Init(SPI_TypeDef *const hspi, uint8_t prescaler) {
+    __attribute__((always_inline)) inline void Init(SPI_TypeDef *const hspi, SPI_InitTypeDef *const conf) {
         using namespace hal;
-        // gpio::Init(conf->miso_pin, gpio::GPIO_InitTypeDef(gpio::Mode::input, gpio::Pull::none));
-        // gpio::Init(conf->mosi_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
-        // gpio::Init(conf->sck_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
-        // gpio::Init(conf->ss_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::high));
+        gpio::Init(conf->miso_pin, gpio::GPIO_InitTypeDef(gpio::Mode::input, gpio::Pull::none));
+        gpio::Init(conf->mosi_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
+        gpio::Init(conf->sck_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
+        gpio::Init(conf->ss_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::high));
 
-        const uint8_t spi2x = (prescaler == 7) ? 0 : (prescaler & 0x01);
-        const uint8_t spr = ((prescaler - 1) >> 1) & 0x03;
+        const uint8_t spi2x = (conf->prescaler == 7) ? 0 : (conf->prescaler & 0x01);
+        const uint8_t spr = ((conf->prescaler - 1) >> 1) & 0x03;
 
         hspi->SPCRx = (0 << SPIE) | (1 << SPE) | (0 << DORD) | (1 << MSTR) | (0 << CPOL) | (0 << CPHA) | (spr << SPR0);
         hspi->SPSRx = (spi2x << SPI2X);
     }
-
 }
 }
 
diff --git a/src/main.cpp b/src/main.cpp
index ca2ab7f..fe31630 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -4,18 +4,17 @@
 
 /// One-time setup of HW and SW components
 /// Called before entering the loop() function
-void setup(){
+void setup() {
     using namespace hal;
 
-    gpio::Init(gpio::GPIO_pin(GPIOB, 3), gpio::GPIO_InitTypeDef(gpio::Mode::input, gpio::Pull::none));
-    gpio::Init(gpio::GPIO_pin(GPIOB, 2), gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
-    gpio::Init(gpio::GPIO_pin(GPIOB, 1), gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
-    // gpio::Init(gpio::GPIO_pin(GPIOB, 0), gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
-
-    // spi::SPI_InitTypeDef spi_conf = {
-    //     .prescaler = 2, //4mhz
-    // };
-    spi::Init(SPI0, 2);
+    spi::SPI_InitTypeDef spi_conf = {
+        .miso_pin = gpio::GPIO_pin(GPIOB, 3),
+        .mosi_pin = gpio::GPIO_pin(GPIOB, 2),
+        .sck_pin = gpio::GPIO_pin(GPIOB, 1),
+        .ss_pin = gpio::GPIO_pin(GPIOB, 0),
+        .prescaler = 2, //4mhz
+    };
+    spi::Init(SPI0, &spi_conf);
 }
 
 /// Main loop of the firmware
@@ -32,13 +31,12 @@ void setup(){
 ///   StepWhateverElseNeedsStepping();
 /// The idea behind the Step* routines is to keep each automaton non-blocking allowing for some “concurrency”.
 /// Some FW components will leverage ISR to do their stuff (UART, motor stepping?, etc.)
-void loop(){
-
+void loop() {
 }
 
 int main() {
     setup();
-    for(;;){
+    for (;;) {
         using namespace hal::gpio;
         WritePin(GPIO_pin(GPIOB, 5), Level::low);
         TogglePin(GPIO_pin(GPIOB, 6));

From db98d0cf7bba43e69419e79b83961e36f58cb557 Mon Sep 17 00:00:00 2001
From: Alex Voinea <voinea.dragos.alexandru@gmail.com>
Date: Mon, 17 May 2021 09:11:11 +0300
Subject: [PATCH 03/10] Add SPI TxRx function

---
 src/hal/spi.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/hal/spi.h b/src/hal/spi.h
index dbf3c1a..c45c251 100644
--- a/src/hal/spi.h
+++ b/src/hal/spi.h
@@ -33,6 +33,13 @@ namespace spi {
         hspi->SPCRx = (0 << SPIE) | (1 << SPE) | (0 << DORD) | (1 << MSTR) | (0 << CPOL) | (0 << CPHA) | (spr << SPR0);
         hspi->SPSRx = (spi2x << SPI2X);
     }
+
+    __attribute__((always_inline)) inline uint8_t TxRx(SPI_TypeDef *const hspi, uint8_t val) {
+        hspi->SPDRx = val;
+        while (!(hspi->SPSRx & (1 << SPIF)))
+            ;
+        return hspi->SPDRx;
+    }
 }
 }
 

From d2d275da250a97a55564dae189ee3c270d2e3832 Mon Sep 17 00:00:00 2001
From: Alex Voinea <voinea.dragos.alexandru@gmail.com>
Date: Mon, 17 May 2021 09:11:24 +0300
Subject: [PATCH 04/10] Explain why we set SS as output

---
 src/hal/spi.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/hal/spi.h b/src/hal/spi.h
index c45c251..b616d56 100644
--- a/src/hal/spi.h
+++ b/src/hal/spi.h
@@ -25,7 +25,7 @@ namespace spi {
         gpio::Init(conf->miso_pin, gpio::GPIO_InitTypeDef(gpio::Mode::input, gpio::Pull::none));
         gpio::Init(conf->mosi_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
         gpio::Init(conf->sck_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
-        gpio::Init(conf->ss_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::high));
+        gpio::Init(conf->ss_pin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::high)); //the AVR requires this pin to be an output for SPI master mode to work properly.
 
         const uint8_t spi2x = (conf->prescaler == 7) ? 0 : (conf->prescaler & 0x01);
         const uint8_t spr = ((conf->prescaler - 1) >> 1) & 0x03;

From 2cf1b8b52374692a8d97f8a49f89236a97804ff6 Mon Sep 17 00:00:00 2001
From: Alex Voinea <voinea.dragos.alexandru@gmail.com>
Date: Mon, 17 May 2021 12:08:20 +0300
Subject: [PATCH 05/10] __attribute__((always_inline)) comment

---
 src/hal/_rules.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/hal/_rules.txt b/src/hal/_rules.txt
index 65c89c5..9dae508 100644
--- a/src/hal/_rules.txt
+++ b/src/hal/_rules.txt
@@ -2,3 +2,6 @@ Use a class whenever you need to store some context data along with the function
 A typical scenario is the UART which uses some RX and TX buffers.
 
 Use a simple C-style otherwise, but it is advised to wrap the interface into a namespace as proposed in existing header files.
+
+`__attribute__((always_inline)) inline` was necessary for most functions because the generated code wasn't efficient enough otherwise.
+It will be interesting when the STM32 hal will have to be included as well. Hopefully it won't be a nightmare :P

From 041d75012d423ef2e51bdf0cdaa8cf4dfc82ddcf Mon Sep 17 00:00:00 2001
From: Alex Voinea <voinea.dragos.alexandru@gmail.com>
Date: Mon, 17 May 2021 17:09:00 +0300
Subject: [PATCH 06/10] Add all possible ports to the AVR GPIO hal

---
 src/hal/gpio.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/hal/gpio.h b/src/hal/gpio.h
index 7b974e8..4d473bf 100644
--- a/src/hal/gpio.h
+++ b/src/hal/gpio.h
@@ -75,8 +75,14 @@ namespace gpio {
 }
 }
 
+#define GPIOA ((hal::gpio::GPIO_TypeDef *)&PINA)
 #define GPIOB ((hal::gpio::GPIO_TypeDef *)&PINB)
 #define GPIOC ((hal::gpio::GPIO_TypeDef *)&PINC)
 #define GPIOD ((hal::gpio::GPIO_TypeDef *)&PIND)
 #define GPIOE ((hal::gpio::GPIO_TypeDef *)&PINE)
 #define GPIOF ((hal::gpio::GPIO_TypeDef *)&PINF)
+#define GPIOG ((hal::gpio::GPIO_TypeDef *)&PING)
+#define GPIOH ((hal::gpio::GPIO_TypeDef *)&PINH)
+#define GPIOJ ((hal::gpio::GPIO_TypeDef *)&PINJ)
+#define GPIOK ((hal::gpio::GPIO_TypeDef *)&PINK)
+#define GPIOL ((hal::gpio::GPIO_TypeDef *)&PINL)

From 57abb7ecc4a50891dca77829179499f0083c2535 Mon Sep 17 00:00:00 2001
From: Alex Voinea <voinea.dragos.alexandru@gmail.com>
Date: Mon, 17 May 2021 17:10:02 +0300
Subject: [PATCH 07/10] Example TMC2130 pinout

---
 src/hal/pins.h | 11 -----------
 src/main.cpp   |  9 +++++----
 src/pins.h     |  9 +++++++++
 3 files changed, 14 insertions(+), 15 deletions(-)
 delete mode 100644 src/hal/pins.h
 create mode 100644 src/pins.h

diff --git a/src/hal/pins.h b/src/hal/pins.h
deleted file mode 100644
index 8745ad5..0000000
--- a/src/hal/pins.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#pragma once
-
-/// Hardware Abstraction Layer for the CPU's features and peripherals
-
-namespace hal {
-namespace pins {
-
-    /// pin definitions
-
-} // namespace pins
-} // namespace hal
diff --git a/src/main.cpp b/src/main.cpp
index fe31630..7a3604a 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -1,6 +1,7 @@
 #include "logic/mm_control.h"
 #include "hal/gpio.h"
 #include "hal/spi.h"
+#include "pins.h"
 
 /// One-time setup of HW and SW components
 /// Called before entering the loop() function
@@ -8,10 +9,10 @@ void setup() {
     using namespace hal;
 
     spi::SPI_InitTypeDef spi_conf = {
-        .miso_pin = gpio::GPIO_pin(GPIOB, 3),
-        .mosi_pin = gpio::GPIO_pin(GPIOB, 2),
-        .sck_pin = gpio::GPIO_pin(GPIOB, 1),
-        .ss_pin = gpio::GPIO_pin(GPIOB, 0),
+        .miso_pin = gpio::GPIO_pin(TMC2130_SPI_MISO_PIN),
+        .mosi_pin = gpio::GPIO_pin(TMC2130_SPI_MOSI_PIN),
+        .sck_pin = gpio::GPIO_pin(TMC2130_SPI_SCK_PIN),
+        .ss_pin = gpio::GPIO_pin(TMC2130_SPI_SS_PIN),
         .prescaler = 2, //4mhz
     };
     spi::Init(SPI0, &spi_conf);
diff --git a/src/pins.h b/src/pins.h
new file mode 100644
index 0000000..154436f
--- /dev/null
+++ b/src/pins.h
@@ -0,0 +1,9 @@
+#pragma once
+#include "hal/gpio.h"
+
+/// pin definitions
+
+#define TMC2130_SPI_MISO_PIN GPIOB, 3
+#define TMC2130_SPI_MOSI_PIN GPIOB, 2
+#define TMC2130_SPI_SCK_PIN GPIOB, 1
+#define TMC2130_SPI_SS_PIN GPIOB, 0

From 13ee425352b725d6a3642d385139365eb420124c Mon Sep 17 00:00:00 2001
From: Alex Voinea <voinea.dragos.alexandru@gmail.com>
Date: Mon, 17 May 2021 17:45:31 +0300
Subject: [PATCH 08/10] Configurable SPI CPHA and CPOL

---
 src/hal/spi.h | 4 +++-
 src/main.cpp  | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/hal/spi.h b/src/hal/spi.h
index b616d56..5e067d3 100644
--- a/src/hal/spi.h
+++ b/src/hal/spi.h
@@ -18,6 +18,8 @@ namespace spi {
         hal::gpio::GPIO_pin sck_pin;
         hal::gpio::GPIO_pin ss_pin;
         uint8_t prescaler;
+        uint8_t cpha;
+        uint8_t cpol;
     };
 
     __attribute__((always_inline)) inline void Init(SPI_TypeDef *const hspi, SPI_InitTypeDef *const conf) {
@@ -30,7 +32,7 @@ namespace spi {
         const uint8_t spi2x = (conf->prescaler == 7) ? 0 : (conf->prescaler & 0x01);
         const uint8_t spr = ((conf->prescaler - 1) >> 1) & 0x03;
 
-        hspi->SPCRx = (0 << SPIE) | (1 << SPE) | (0 << DORD) | (1 << MSTR) | (0 << CPOL) | (0 << CPHA) | (spr << SPR0);
+        hspi->SPCRx = (0 << SPIE) | (1 << SPE) | (0 << DORD) | (1 << MSTR) | ((conf->cpol & 0x01) << CPOL) | ((conf->cpha & 0x01) << CPHA) | (spr << SPR0);
         hspi->SPSRx = (spi2x << SPI2X);
     }
 
diff --git a/src/main.cpp b/src/main.cpp
index 7a3604a..251eae2 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -14,6 +14,8 @@ void setup() {
         .sck_pin = gpio::GPIO_pin(TMC2130_SPI_SCK_PIN),
         .ss_pin = gpio::GPIO_pin(TMC2130_SPI_SS_PIN),
         .prescaler = 2, //4mhz
+        .cpha = 1,
+        .cpol = 1,
     };
     spi::Init(SPI0, &spi_conf);
 }

From 15c56f2a1c14ff5894ea284c377c14107c891a1f Mon Sep 17 00:00:00 2001
From: Alex Voinea <voinea.dragos.alexandru@gmail.com>
Date: Mon, 17 May 2021 19:09:49 +0300
Subject: [PATCH 09/10] Add F_CPU

---
 CMakeLists.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 138f023..63758b3 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -125,7 +125,7 @@ endif()
 
 if(CMAKE_CROSSCOMPILING)
   # mcu related settings
-  set(MCU_FLAGS -mmcu=atmega32u4)
+  set(MCU_FLAGS -mmcu=atmega32u4 -DF_CPU=16000000L)
   add_compile_options(${MCU_FLAGS})
   add_link_options(${MCU_FLAGS})
 

From c378e7101838ada26ec4cb36b679e17dc84a3b10 Mon Sep 17 00:00:00 2001
From: Alex Voinea <voinea.dragos.alexandru@gmail.com>
Date: Mon, 17 May 2021 19:11:35 +0300
Subject: [PATCH 10/10] SPI example

---
 src/main.cpp | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/src/main.cpp b/src/main.cpp
index 251eae2..679406f 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -18,6 +18,25 @@ void setup() {
         .cpol = 1,
     };
     spi::Init(SPI0, &spi_conf);
+
+    // SPI example
+    gpio::Init(gpio::GPIO_pin(GPIOC, 6), gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::high));
+    uint8_t dat[5];
+    gpio::WritePin(gpio::GPIO_pin(GPIOC, 6), gpio::Level::low);
+    spi::TxRx(SPI0, 0x01);
+    spi::TxRx(SPI0, 0x00);
+    spi::TxRx(SPI0, 0x00);
+    spi::TxRx(SPI0, 0x00);
+    spi::TxRx(SPI0, 0x00);
+    gpio::WritePin(gpio::GPIO_pin(GPIOC, 6), gpio::Level::high);
+    gpio::WritePin(gpio::GPIO_pin(GPIOC, 6), gpio::Level::low);
+    dat[0] = spi::TxRx(SPI0, 0x00);
+    dat[1] = spi::TxRx(SPI0, 0x00);
+    dat[2] = spi::TxRx(SPI0, 0x00);
+    dat[3] = spi::TxRx(SPI0, 0x00);
+    dat[4] = spi::TxRx(SPI0, 0x00);
+    gpio::WritePin(gpio::GPIO_pin(GPIOC, 6), gpio::Level::high);
+    (void)dat;
 }
 
 /// Main loop of the firmware