Improve mulU8X16toH16 accordingly

pull/158/head
D.R.racer 2022-02-21 18:24:20 +01:00 committed by DRracer
parent aefa962cc3
commit f2b65ebda2
1 changed files with 10 additions and 12 deletions

View File

@ -14,19 +14,17 @@ static inline uint16_t mulU8X16toH16(const uint8_t charIn1, const uint16_t intIn
intRes = ((uint32_t)charIn1 * (uint32_t)intIn2) >> 8; intRes = ((uint32_t)charIn1 * (uint32_t)intIn2) >> 8;
#else #else
asm volatile( asm volatile(
"clr r26 \n\t" "mul %B2, %A1 \n\t"
"mul %A1, %B2 \n\t" "movw %0, r0 \n\t"
"movw %A0, r0 \n\t" "mul %A2, %A1 \n\t"
"mul %A1, %A2 \n\t" "lsl r0 \n\t" //push MSB to carry for rounding
"add %A0, r1 \n\t" "adc %A0, r1 \n\t" //add with carry (for rounding)
"adc %B0, r26 \n\t" "clr r1 \n\t" //make r1 __zero_reg__ again
"lsr r0 \n\t" "adc %B0, r1 \n\t" //propagate carry of addition (add 0 with carry)
"adc %A0, r26 \n\t"
"adc %B0, r26 \n\t"
"clr r1 \n\t"
: "=&r"(intRes) : "=&r"(intRes)
: "d"(charIn1), "d"(intIn2) : "r"(charIn1), "r"(intIn2)
: "r26"); : "r0", "r1" //clobbers: Technically these are either scratch registers or always 0 registers, but I'm making sure the compiler knows just in case.
);
#endif #endif
return intRes; return intRes;
} }