Simplify logic

pull/67/head
Alex Voinea 2021-07-20 19:14:33 +03:00 committed by D.R.racer
parent 89a2bdc7e4
commit fbe8d3d6cd
1 changed files with 1 additions and 1 deletions

View File

@ -28,7 +28,7 @@ public:
uint32_t ticks = timeout * F_WDT / (basePrescaler * (1 << prescalerBits));
while ((ticks >= (1 << reloadBits)) && (prescalerBits < maxPrescaler)) {
prescalerBits++;
ticks = timeout * F_WDT / (basePrescaler * (1 << prescalerBits));
ticks >>= 1;
}
if ((prescalerBits == 0) && (ticks == 0))
ticks = 1; //1 tick is minimum