3 Commits (df97d70d8e2e74a243a4e98a68c2d13a8731b747)

Author	SHA1	Message	Date
D.R.racer	de8a2f35ae	Fix setup/FINDA init state ... It turned out FINDA needs running timer to perform BlockingInit() correctly. Therefore setup() was split into setup() (no IRQ) and setup2() (IRQ enabled). Then, finally, the check for FINDA state became reliable upon start of the FW.	2022-06-14 07:32:08 +02:00
D.R.racer	6af65bc4c8	Rename ISR -> Isr to avoid clash with AVR libc ISR #define	2021-07-26 09:34:24 +02:00
D.R.racer	ede475c5a6	Introduce Timebase module, refactor timing code + unit tests	2021-06-21 10:22:17 +02:00