332 lines
11 KiB
C++
332 lines
11 KiB
C++
/// @file tmc2130.cpp
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#include "tmc2130.h"
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#include "../config/config.h"
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#include "../debug.h"
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//! @defgroup TMC2130 current to value translation table
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//! @{
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//! @brief Translate current to tmc2130 vsense and IHOLD or IRUN - copied from MK3 FW repo.
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//! @param cur current in mA
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//! @return 0 .. 63
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//! @n most significant bit is CHOPCONF vsense bit (sense resistor voltage based current scaling).
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//! @n rest is to be used in IRUN or IHOLD register.
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//!
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//! | mA | trinamic register | note |
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//! | --- | --- | --- |
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//! | 0 | 0 | doesn't mean current off, lowest current is 1/32 current with vsense low range |
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//! | 30 | 1 | |
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//! | 40 | 2 | |
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//! | 60 | 3 | |
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//! | 90 | 4 | |
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//! | 100 | 5 | |
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//! | 120 | 6 | |
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//! | 130 | 7 | |
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//! | 150 | 8 | |
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//! | 180 | 9 | |
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//! | 190 | 10 | |
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//! | 210 | 11 | |
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//! | 230 | 12 | |
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//! | 240 | 13 | |
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//! | 250 | 13 | |
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//! | 260 | 14 | |
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//! | 280 | 15 | |
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//! | 300 | 16 | |
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//! | 320 | 17 | |
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//! | 340 | 18 | |
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//! | 350 | 19 | |
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//! | 370 | 20 | |
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//! | 390 | 21 | |
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//! | 410 | 22 | |
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//! | 430 | 23 | |
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//! | 450 | 24 | |
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//! | 460 | 25 | |
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//! | 480 | 26 | |
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//! | 500 | 27 | |
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//! | 520 | 28 | |
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//! | 525 | 29 | |
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//! | 530 | 30 | |
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//! | 540 | 33 | |
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//! | 560 | 34 | |
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//! | 580 | 35 | |
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//! | 590 | 36 | |
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//! | 610 | 37 | |
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//! | 630 | 38 | |
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//! | 640 | 39 | |
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//! | 660 | 40 | |
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//! | 670 | 41 | |
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//! | 690 | 42 | |
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//! | 710 | 43 | |
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//! | 720 | 44 | |
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//! | 730 | 45 | |
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//! | 760 | 46 | |
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//! | 770 | 47 | |
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//! | 790 | 48 | |
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//! | 810 | 49 | |
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//! | 820 | 50 | |
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//! | 840 | 51 | |
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//! | 850 | 52 | |
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//! | 870 | 53 | |
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//! | 890 | 54 | |
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//! | 900 | 55 | |
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//! | 920 | 56 | |
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//! | 940 | 57 | |
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//! | 950 | 58 | |
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//! | 970 | 59 | |
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//! | 980 | 60 | |
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//! | 1000 | 61 | |
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//! | 1020 | 62 | |
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//! | 1029 | 63 | |
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//! @}
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namespace hal {
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namespace tmc2130 {
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static constexpr uint8_t TOFF_DEFAULT = 3U, TOFF_MASK = 0xFU;
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bool __attribute__((noinline)) TMC2130::Init(const MotorParams ¶ms, const MotorCurrents ¤ts, MotorMode mode) {
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initialized = false;
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// sg_filter_threshold = (1 << (8 - params.mRes));
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sg_filter_threshold = 2;
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gpio::Init(params.csPin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::high));
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gpio::Init(params.sgPin, gpio::GPIO_InitTypeDef(gpio::Mode::input, gpio::Pull::up));
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gpio::Init(params.stepPin, gpio::GPIO_InitTypeDef(gpio::Mode::output, gpio::Level::low));
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/// check for compatible tmc driver (IOIN version field)
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uint32_t IOIN = ReadRegister(params, Registers::IOIN);
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// if the version is incorrect or a bit always set to 1 is suddenly 0
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// (the supposed SD_MODE pin that doesn't exist on this driver variant)
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if (((IOIN >> 24U) != 0x11) | !(IOIN & (1U << 6U)))
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return false; // @@TODO return some kind of failure
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/// clear reset_flag as we are (re)initializing
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errorFlags.reset_flag = false;
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// clear all error flags if possible ny reading GSTAT
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ReadRegister(params, Registers::GSTAT);
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/// apply chopper parameters
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// const uint32_t chopconf = (uint32_t)(TOFF_DEFAULT & TOFF_MASK) << 0U // toff
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// | (uint32_t)(5U & 0x07U) << 4U // hstrt
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// | (uint32_t)(1U & 0x0FU) << 7U // hend
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// | (uint32_t)(2U & 0x03U) << 15U // tbl
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// | (uint32_t)(currents.vSense & 0x01U) << 17U // vsense
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// | (uint32_t)(params.mRes & 0x0FU) << 24U // mres
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// | (uint32_t)(1U & 0x01) << 28U // intpol (always true)
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// | (uint32_t)(1U & 0x01) << 29U; // dedge (always true)
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// this ugly union/bit structure saves 34B over the previous implementation
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union ChopConfU {
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struct __attribute__((packed)) S {
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uint8_t toff : 4;
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uint8_t hstrt : 3;
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uint8_t hend : 4;
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uint8_t fd : 1;
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uint8_t disfdcc : 1;
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uint8_t rndtf : 1;
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uint8_t chm : 1;
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uint8_t tbl : 2;
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uint8_t vsense : 1;
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uint8_t vhighfs : 1;
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uint8_t vhighchm : 1;
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uint8_t sync : 4;
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uint8_t mres : 4;
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uint8_t intpol : 1;
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uint8_t dedge : 1;
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uint8_t diss2g : 1;
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uint8_t reserved : 1;
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constexpr S(bool vsense, uint8_t mres)
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: toff(TOFF_DEFAULT)
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, hstrt(5)
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, hend(1)
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, fd(0)
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, disfdcc(0)
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, rndtf(0)
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, chm(0)
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, tbl(2)
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, vsense(vsense)
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, vhighfs(0)
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, vhighchm(0)
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, sync(0)
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, mres(mres)
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, intpol(1)
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, dedge(1)
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, diss2g(0)
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, reserved(0) {}
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} s;
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uint32_t dw;
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constexpr ChopConfU(bool vsense, uint8_t mres)
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: s(vsense, mres) {}
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};
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static_assert(sizeof(ChopConfU::S) == 4);
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static_assert(sizeof(ChopConfU) == 4);
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WriteRegister(params, Registers::CHOPCONF, ChopConfU(currents.vSense, params.mRes).dw);
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/// apply currents
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SetCurrents(params, currents);
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/// instant powerdown ramp
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WriteRegister(params, Registers::TPOWERDOWN, 0);
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/// Stallguard parameters
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SetSGTHRS(params);
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WriteRegister(params, Registers::TCOOLTHRS, config::tmc2130_coolStepThreshold);
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/// Write stealth mode config and setup diag0 output
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constexpr uint32_t gconf = (uint32_t)(1U & 0x01U) << 2U // en_pwm_mode - always enabled since we can control it's effect with TPWMTHRS (0=only stealthchop, 0xFFFFF=only spreadcycle)
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| (uint32_t)(1U & 0x01U) << 7U; // diag0_stall - diag0 is open collector => active low with external pullups
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WriteRegister(params, Registers::GCONF, gconf);
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/// stealthChop parameters
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constexpr uint32_t pwmconf = ((uint32_t)(config::tmc2130_PWM_AMPL) << 0U)
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| ((uint32_t)(config::tmc2130_PWM_GRAD) << 8U)
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| ((uint32_t)(config::tmc2130_PWM_FREQ) << 16U)
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| ((uint32_t)(config::tmc2130_PWM_AUTOSCALE & 0x01U) << 18U)
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| ((uint32_t)(config::tmc2130_freewheel & 0x03U) << 20U); // special freewheeling mode only active in stealthchop when IHOLD=0 and CS=0 (actual current)
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WriteRegister(params, Registers::PWMCONF, pwmconf);
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/// TPWMTHRS: switching velocity between stealthChop and spreadCycle.
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/// Stallguard is also disabled if the velocity falls below this.
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/// Should be set as high as possible when homing.
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SetMode(params, mode);
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initialized = true;
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return true;
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}
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void TMC2130::SetMode(const MotorParams ¶ms, MotorMode mode) {
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/// 0xFFFF0 is used as a "Normal" mode threshold since stealthchop will be used at standstill.
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WriteRegister(params, Registers::TPWMTHRS, (mode == Stealth) ? 70 : 0xFFFF0); // @@TODO should be configurable
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}
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void TMC2130::SetBridgeOutput(const MotorParams ¶ms, bool bOn) {
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uint32_t chopconf = ReadRegister(params, Registers::CHOPCONF);
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chopconf &= ~((uint32_t)TOFF_MASK);
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if (bOn) {
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chopconf |= TOFF_DEFAULT;
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}
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WriteRegister(params, Registers::CHOPCONF, chopconf);
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}
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void TMC2130::SetCurrents(const MotorParams ¶ms, const MotorCurrents ¤ts) {
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uint8_t iHold = currents.iHold;
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const uint8_t iRun = currents.iRun;
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// uint32_t ihold_irun = (uint32_t)(iHold & 0x1F) << 0 // ihold
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// | (uint32_t)(iRun & 0x1F) << 8 // irun
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// | (uint32_t)(15 & 0x0F) << 16; // IHOLDDELAY
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// Rewriting the above code into a union makes it 18B shorter
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// Obviously, those bit shifts and ORs were not understood correctly by the compiler...
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// Now it looks nice:
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// 15f6: push r16
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// 15f8: push r17
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// 15fa: movw r30, r20
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// 15fc: ldd r16, Z+2
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// 15fe: ldd r18, Z+1
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// 1600: mov r17, r18
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// 1602: andi r17, 0x1F
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// 1604: cp r18, r16
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// 1606: brcs .+18 ; 0x161a
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// 1608: andi r16, 0x1F
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// 160a: ldi r18, 0x0F
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// 160c: ldi r19, 0x00
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// 160e: ldi r20, 0x10
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// 1610: call 0x1452 ; 0x1452 <hal::tmc2130::TMC2130::WriteRegister(...
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// 1614: pop r17
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// 1616: pop r16
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// 1618: ret
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// 161a: mov r16, r17
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// 161c: rjmp .-20 ; 0x160a
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union IHoldRun {
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struct S {
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uint8_t iHold;
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uint8_t iRun;
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uint16_t iHoldDelay;
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constexpr S(uint8_t ih, uint8_t ir)
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: iHold(ih)
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, iRun(ir)
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, iHoldDelay(15 & 0x0F) {}
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} s;
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uint32_t dw;
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constexpr IHoldRun(uint8_t ih, uint8_t ir)
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: s(ih, ir) {}
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};
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// also, make sure iHold never exceeds iRun at runtime
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IHoldRun ihold_irun((iHold > iRun ? iRun : iHold) & 0x1f, iRun & 0x1f);
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WriteRegister(params, Registers::IHOLD_IRUN, ihold_irun.dw);
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}
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void TMC2130::SetSGTHRS(const MotorParams ¶ms) {
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uint32_t tmc2130_coolConf = (((uint32_t)params.sg_thrs) << 16U);
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WriteRegister(params, Registers::COOLCONF, tmc2130_coolConf);
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}
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void TMC2130::SetEnabled(const MotorParams ¶ms, bool enabled) {
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hal::shr16::shr16.SetTMCEnabled(params.idx, enabled);
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if (this->enabled != enabled)
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ClearStallguard();
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this->enabled = enabled;
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}
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bool __attribute__((noinline)) TMC2130::CheckForErrors(const MotorParams ¶ms) {
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if (!initialized)
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return false;
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uint32_t GSTAT = ReadRegister(params, Registers::GSTAT);
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uint32_t DRV_STATUS = ReadRegister(params, Registers::DRV_STATUS);
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errorFlags.reset_flag |= !!(GSTAT & (1U << 0U));
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errorFlags.uv_cp = !!(GSTAT & (1U << 2U));
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errorFlags.s2g = !!(DRV_STATUS & (3UL << 27U));
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errorFlags.otpw = !!(DRV_STATUS & (1UL << 26U));
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errorFlags.ot = !!(DRV_STATUS & (1UL << 25U));
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return GSTAT || errorFlags.reset_flag; // any bit in gstat is an error
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}
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uint32_t TMC2130::ReadRegister(const MotorParams ¶ms, Registers reg) {
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uint8_t pData[5] = { (uint8_t)reg };
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_spi_tx_rx(params, pData);
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pData[0] = 0;
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_spi_tx_rx(params, pData);
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_handle_spi_status(params, pData[0]);
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return ((uint32_t)pData[1] << 24 | (uint32_t)pData[2] << 16 | (uint32_t)pData[3] << 8 | (uint32_t)pData[4]);
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}
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void TMC2130::WriteRegister(const MotorParams ¶ms, Registers reg, uint32_t data) {
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uint8_t pData[5] = { (uint8_t)((uint8_t)(reg) | 0x80), (uint8_t)(data >> 24), (uint8_t)(data >> 16), (uint8_t)(data >> 8), (uint8_t)data };
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_spi_tx_rx(params, pData);
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_handle_spi_status(params, pData[0]);
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}
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void TMC2130::Isr(const MotorParams ¶ms) {
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if (sg_filter_counter) {
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if (SampleDiag(params))
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sg_filter_counter--;
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else if (sg_filter_counter < sg_filter_threshold)
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sg_filter_counter++;
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}
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}
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void TMC2130::_spi_tx_rx(const MotorParams ¶ms, uint8_t (&pData)[5]) {
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hal::gpio::WritePin(params.csPin, hal::gpio::Level::low);
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for (uint8_t i = 0; i < sizeof(pData); i++) {
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// @@TODO horrible hack to persuate the compiler, that the expression is const in terms of memory layout and meaning,
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// but we need to write into those registers
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pData[i] = hal::spi::TxRx(const_cast<hal::spi::SPI_TypeDef *>(params.spi), pData[i]);
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}
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hal::gpio::WritePin(params.csPin, hal::gpio::Level::high);
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}
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void TMC2130::_handle_spi_status(const MotorParams ¶ms, uint8_t status) {
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//@@TODO
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// errorFlags.reset_flag |= status & (1 << 0);
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// errorFlags.driver_error |= status & (1 << 1);
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}
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} // namespace tmc2130
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} // namespace hal
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