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(Hopefully) Fir shr16 timing issues 

Should also hopefully fix the random behavior of the DIR pins. When I was testing a really slow timing, the steppers seemed to want to not go in the right direction. That was fixed with the critical section. The 1us delay might be overkill, but I'm not the one that added a 100nF capacitor on the LATCH line (basically chip select). This might be part of the randomness that happened and why some board behaved better than others (stronger GPIO outputs)
pull/126/head
Alex Voinea 2021-09-30 22:09:31 +02:00 committed by DRracer
parent 34442469a3
commit 94e6d1403e
1 changed files with 16 additions and 8 deletions
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24
src/hal/avr/shr16.cpp
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@ -1,6 +1,8 @@
#include "../shr16.h" #include "../shr16.h"
#include "../gpio.h" #include "../gpio.h"
#include "../../pins.h" #include "../../pins.h"
#include <util/delay.h>
#include <util/atomic.h>
#define SHR16_LED_MSK 0xffc0 #define SHR16_LED_MSK 0xffc0
#define SHR16_DIR_MSK 0x0015 #define SHR16_DIR_MSK 0x0015
@ -20,15 +22,21 @@ void SHR16::Init() {
} }
void SHR16::Write(uint16_t v) { void SHR16::Write(uint16_t v) {
using namespace hal::gpio; ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
WritePin(SHR16_LATCH, Level::low); using namespace hal::gpio;
for (uint16_t m = 0x8000; m; m >>= 1) { WritePin(SHR16_LATCH, Level::low);
WritePin(SHR16_DATA, (Level)((m & v) != 0)); _delay_us(1);
WritePin(SHR16_CLOCK, Level::high); for (uint16_t m = 0x8000; m; m >>= 1) {
WritePin(SHR16_CLOCK, Level::low); WritePin(SHR16_DATA, (Level)((m & v) != 0));
asm("nop");
WritePin(SHR16_CLOCK, Level::high);
asm("nop");
WritePin(SHR16_CLOCK, Level::low);
asm("nop");
}
WritePin(SHR16_LATCH, Level::high);
shr16_v = v;
} }
WritePin(SHR16_LATCH, Level::high);
shr16_v = v;
} }
void SHR16::SetLED(uint16_t led) { void SHR16::SetLED(uint16_t led) {