Even more shr16 documentation

pull/96/head
Alex Voinea 2021-08-21 16:12:37 +03:00 committed by DRracer
parent 55ac3d5c32
commit fc2fce1230
1 changed files with 22 additions and 20 deletions

View File

@ -7,31 +7,33 @@ namespace hal {
/// 16bit shift register (2x74595) interface /// 16bit shift register (2x74595) interface
/// ///
/// The pinout is hard coded as follows: /// The pinout is hard coded as follows:
/// SHR16_CLK: signal d13 - PC7 /// 32u4 port Schematics
/// SHR16_LAT: signal d10 - PB6 /// SHR16_CLK: signal D13 - PC7 U8 -> U2 & U9 & P6 - SHCP (CLOCK)
/// SHR16_DAT: signal d9 - PB5 /// SHR16_LAT: signal D10 - PB6 U8 -> U2 & U9 & P6 - STCP (LATCH)
/// SHR16_DAT: signal D9 - PB5 U8 -> U2 -> U9 -> P6 - DS/Q7S (DATA)
/// ///
/// Shift register outputs: /// Shift register outputs:
/// LEDS - hardcoded /// LEDS - hardcoded 74HC595 Schematics
/// SHR16_LEDR0 = 0x0080 /// SHR16_LEDR0 = 0x0080 Q0.7 U2 -> D23 closest LED to Button S2
/// SHR16_LEDG0 = 0x0040 /// SHR16_LEDG0 = 0x0040 Q0.6 U2 -> D22
/// SHR16_LEDR1 = 0x8000 /// SHR16_LEDR1 = 0x8000 Q1.7 U9 -> D21
/// SHR16_LEDG1 = 0x4000 /// SHR16_LEDG1 = 0x4000 Q1.6 U9 -> D20
/// SHR16_LEDR2 = 0x2000 /// SHR16_LEDR2 = 0x2000 Q1.5 U9 -> D19
/// SHR16_LEDG2 = 0x1000 /// SHR16_LEDG2 = 0x1000 Q1.4 U9 -> D18
/// SHR16_LEDR3 = 0x0800 /// SHR16_LEDR3 = 0x0800 Q1.3 U9 -> D17
/// SHR16_LEDG3 = 0x0400 /// SHR16_LEDG3 = 0x0400 Q1.2 U9 -> D16
/// SHR16_LEDR4 = 0x0200 /// SHR16_LEDR4 = 0x0200 Q1.1 U9 -> D15
/// SHR16_LEDG4 = 0x0100 /// SHR16_LEDG4 = 0x0100 Q1.0 U9 -> D14 clostest LED to usb port J1
/// SHR16_LED_MSK = 0xffc0 /// SHR16_LED_MSK = 0xffc0
/// ///
/// TMC2130 Direction/Enable signals - hardcoded /// TMC2130 Direction/Enable signals - hardcoded
/// SHR16_DIR_0 = 0x0001 /// 74HC595 Schematics
/// SHR16_ENA_0 = 0x0002 /// SHR16_DIR_0 = 0x0001 Q0.0 U2 -> U5 - DIR
/// SHR16_DIR_1 = 0x0004 /// SHR16_ENA_0 = 0x0002 Q0.1 U2 -> U5 - DRV-ENN
/// SHR16_ENA_1 = 0x0008 /// SHR16_DIR_1 = 0x0004 Q0.2 U2 -> U6 - DIR
/// SHR16_DIR_2 = 0x0010 /// SHR16_ENA_1 = 0x0008 Q0.3 U2 -> U6 - DRV-ENN
/// SHR16_ENA_2 = 0x0020 /// SHR16_DIR_2 = 0x0010 Q0.4 U2 -> U7 - DIR
/// SHR16_ENA_2 = 0x0020 Q0.5 U2 -> U7 - DRV-ENN
/// ///
/// SHR16_DIR_MSK = (SHR16_DIR_0 + SHR16_DIR_1 + SHR16_DIR_2) /// SHR16_DIR_MSK = (SHR16_DIR_0 + SHR16_DIR_1 + SHR16_DIR_2)
/// SHR16_ENA_MSK = (SHR16_ENA_0 + SHR16_ENA_1 + SHR16_ENA_2) /// SHR16_ENA_MSK = (SHR16_ENA_0 + SHR16_ENA_1 + SHR16_ENA_2)